Dp 606 en
PLC program verification[editovat]
Author: Ondřej Maslikiewicz
This thesis is about analyzing and verification of PLC program. There is also an instrument for automatical generating of binar decision diagram and for state machines for variables which are used in PLC program. Main result of thesis is translation of program in Ladder Diagram into BDD and state machine. Verification of the program is made by translation of state machine into UPPAAL.
- Maslikiewicz Ondřej, mailto:firstname.lastname@example.org